As version 9, Sparc introduced a 64-bit architecture in 1993. This new version of SPARC introduces 64-bit addressing, superscalar execution, instruction and data prefetching, nonfaulting loads, and some changes to trap handling.
64-bit support
Since the sizes of data sets and programs continue to increase, 64-bit addressing support became necessary, and SPARC took on this challenge. The register sizes doubled and the instruction set expanded to include loads of doublewords. The CPU can calculate 64-bit address arithmetic. Regular artithmetic instructions needed no changing since they are register format instructions. But, the user must beware of a new condition code register that has been created if they are to use the condition codes set by arithmetic instructions or others. Most older programs running in 64-bit SPARC expect to interrogate a 32-bit condtion code register. That is still provided, along with a new 64-bit condition code register of a different name. Additionally, if arithmetic operations in older 32-bit programs are to load negative constant values, the architecture requires them now to propogate the sign bit out to the h.o.b. of the new, larger registers.
Superscalar Execution
In addition to pipelining, the new architecture calls for superscalar execution, in which more than one instruction may be fetched at a time. This causes far more serious hazards in branching than with the previous design, and version 9 solves this with branch prediction, a feature available in other processors such as MIPS during their 32-bit lives.
Instruction and Data prefetching
Instruction prefetching can be done before taking a known branch or call to another program. Without prefetching, the instructions at the branch or called location probably are not in the same area of memory as the calling routine. So, the instructions to be called are probably not in cache, either. Prefetching allows the programmer to speed up transition over a call by prefetching the instructions in the new routine to cache.
The same can also be used to speed up loading of data in a loop. If an pointer is used in a loop to cycle through an array, that pointer can be stored elsewhere, incremented as the loop would do it on the next execution, and the next element in the array can be prefetched for processing.
Nonfaulting Loads
Nonfaulting loads prevent processor failures by testing for bad addresses ahead of time using a new system register.
Trap Handling
SPARC version 9 allows for traps to be called during trap routines by providing a trap stack. Another major development is in the area of register window overflow handling. The change reduces the need for the entire circular register buffer to be flushed when register overflow occurs.
Paul Austin
Charles Gates
Last modified: Tue Apr 23 09:15:13 EDT 2002