SPARC Instruction Types

Introduction

Like most RISC machines, the SPARC and MIPS machines have many instructions divided into a few machine instruction types. By having only a few instruction types, the machine architecture is easier to design and easier to optimize.

Both the MIPS machine and the SPARC machine use instructions that are thirty-two bits long. Both machines have three instruction types. In the MIPS machine they are called R-format, I-format and J-format. On the SPARC they are called Format 1, Format 2 and Format 3 instructions.

Both machines have an instruction type for algebraic instructions (R-format and Format 3 instructions), for branch instructions (I-format and Format 2 instructions), and for jump instructions (J-format and Format 1 instructions). Unlike the MIPS, the SPARC load and store instructions are Format 3 (algebraic) instructions. The SPARC also adds an instruction to the Format 2 instructions called sethi that is similar to the MIPS lui instruction.

The layout of the SPARC instructions is:

SPARC Instruction Types

Format One -- Jump Instructions:

The SPARC call Instruction, used to transfer control to anywhere in the 32-bit address space looks like:

+-------------------------------------------------------------+
| 01 |         30 bit constant                                |
+-------------------------------------------------------------+
    

Like the MIPS jump instruction (J-format), there is only one instruction in the SPARC machine that is a Format One instruction called the CALL instruction. When this instruction is encountered, control is transferred immediately to the new location given by the 30 bit constant. How the location is determined is the constant is shifted left by two bits (to create a 32-bit word) and the pc is set to this value plus the current pc. The address change is relative to the program counter to enable the program to be moved in memory without affecting the addresses specified by the call instructions.

Format Two -- Branch and Sethi Instructions:

The format two instructions are primarily branch instructions which look like:

+-------------------------------------------------------------+
| 00 |a(1)| cond(4) | op2(3)| 22 bit constant                 |
+-------------------------------------------------------------+
    

As usual, the first two bits specify the instruction type, the cond is the branch condition and the op2 is the operand to compare against. If met the machine transfers control to the location specified by the 22 bit constant.

Unlike the MIPS, the SPARC provides for multiple branch instructions. The type of the branch is determined by the cond bits. If the branch is taken, then the pc is set to the constant left-shifted by 2 and added to the program counter. Notice that this only allows a branch up to 2^21 memory locations. To branch throughout the whole memory range, special handling is required.

Another, non-branch format two instruction is:

+-------------------------------------------------------------+
| 00 |rd (5)  |100|           22 bit constant                 |
+-------------------------------------------------------------+
    

This Format Two instruction is known as the sethi instruction. This instruction is used to load a thirty-two bit instruction into a register. To do the load, this instruction will load the high twenty-two bits and then an "or" instruction is called to load the low ten bits of the word.

Format Three: -- Algebraic Instructions:

These instruction are the most common instructions. They are either algebraic instructions or load/store instructions (except sethi).

These instructions have a destination register, called rd; an instruction specifier called op3, and an source register, called rs1. The other source of the operation can either be another source register, called rs2 or a thirteen bit constant (for immediate operations).

Notice, that since this format type includes the loads and stores, there is a potential problem with them only having a 13 bit constant. How can the memory be addressed in such a limited (2^13) range? For these cases, the instruction address is relative to the frame pointer. Compared to the MIPS machine, the memory addressing will have to be slower since the MIPS I-format instructions can naturally address a larger memory range and therefore won't need the additional instruction to load an address into the register before the load instruction (like the SPARC machine needs to do).

The format of the format three instruction is:

Two Source Register Instruction:
+-------------------------------------------------------------+
| 10 | rd (5) |  op3 (6) | rs1 (5) |0|   unused (8) | rs2 (5) |
+-------------------------------------------------------------+

One Source Register and Constant Instruction:
+-------------------------------------------------------------+
| 11 | rd (5) | op3 (6) | rs1 (5)  |1|   signed 13 bit const  |
+-------------------------------------------------------------+
    

As can be seen, the opcode of 10 is an algebraic instruction that has two operands and a destination register. The opcode of 11 are the immediate operations and the load/store operations.

Paul Austin Charles Gates