SPARC Architecture

Introduction

Scalable Processor ARChitecture (SPARC) is a RISC-based architecture developed and licensed by SPARC International Inc., a consortium of computer makers who control the design. The ‘scalable’ part of the name means that the design allows for forward compatability of programs. It was developed at the same time as the MIPS architecture, but at Berkeley instead of Stanford. Like MIPS, the architecture is open (not proprietary), and the name SPARC is licensed by SPARC international to those who manufacture chips implementing the architecture, as MIPS is licensed by another organization. Some implementors of SPARC include Sun Microsystems, Texas Instruments, Toshiba, Fujitsu, Cypress, and Tatung, among others. These companies use the chip in applications ranging from laptops to supercomputers.

SPARC was first implemented by Sun in 1987, using the SPARC version 7 architecture as published by SPARC international, and since then has gone through two major changes: SPARC v8 in 1990, and the latest implementation, SPARC v9, first published in 1994, which - as does MIPS - introduces 64-bit addressing support. True to the ‘scalable’ name, it allows for compatability with 32-bit applications.

Paul Austin Charles Gates